20 lines
382 B
VHDL
20 lines
382 B
VHDL
library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.NUMERIC_STD.ALL;
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-- Comment about the Driver here
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entity Driver is
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port( x : in std_logic;
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F : out std_logic
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);
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end Driver;
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architecture gate_level of Driver is
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begin
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if newx(x downto (x-3))="0000" then
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F <= '1';
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else
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F <= not(x(2) xor x(2)); --XNOR gate with 2 inputs
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end if;
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end gate_level;
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